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ZL30112 Datasheet, Zarlink Semiconductor

ZL30112 dpll equivalent, slic/codec dpll.

ZL30112 Avg. rating / M : 1.0 rating-12

datasheet Download (Size : 349.75KB)

ZL30112 Datasheet
ZL30112
Avg. rating / M : 1.0 rating-12

datasheet Download (Size : 349.75KB)

ZL30112 Datasheet

Features and benefits

November 2009
* Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input
* Provides 2.048 MHz and 8.192 MHz output clocks and an 8 kHz framing pulse
*.

Application

Description The ZL30112 SLIC/CODEC DPLL contains a digital phase-locked loop (DPLL), which provides timing and synchron.

Description

The ZL30112 SLIC/CODEC DPLL contains a digital phase-locked loop (DPLL), which provides timing and synchronization for SLIC/CODEC devices. The ZL30112 generates TDM clock and framing signals that are phase locked to the input reference. It helps ensu.

Image gallery

ZL30112 Page 1 ZL30112 Page 2 ZL30112 Page 3

TAGS

ZL30112
SLIC
CODEC
DPLL
Zarlink Semiconductor

Manufacturer


Zarlink Semiconductor

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